A Low-power Analogue SC-CMOS Filter suitable to implement the Wavelet Algorithm to analyse ECG signals in Pacemakers

Inhaltsverzeichnis (Table of Contents)

• Introduction
• Chapter I
  • Laplace transform and Padè approximation
  • Impulse invariance technique
• Chapter II
  • State-Space realization
  • State-Space optimization
  • Hessenberg and Schur decompositions
  • Optimal capacitance distribution
• Chapter III
  • State-Space realization in continuous time
• Chapter IV
  • Synthesis of the state-space filter
  • Filter settings
  • First approach to the circuit
  • Impulse transient response of the circuit with ideal amplifiers
  • Step transient response of the circuit with ideal amplifiers
  • Sine transient response of the circuit with ideal amplifiers
  • Clock feedthrough
• Chapter V
  • Two-stage CMOS operational amplifier topology
  • Analysis of the amplifier
  • Frequency compensation
  • Integrator bandwidth
  • Considerations on the amplifier
  • Calculus of the transconductance by noise-optimisation
  • Calculus of the biasing current and design of the amplifier
• Chapter VI
  • Transmission gate and dummy gate
  • Impulse transient response
  • Step transient response
  • Sine transient response
  • Power consumption
  • Noise analysis
• Chapter VII
  • Considerations on the wavelet filter
• References

Zielsetzung und Themenschwerpunkte (Objectives and Key Themes)

This thesis aims to design and implement a low-power analog SC-CMOS filter for analyzing ECG signals in pacemakers. The work focuses on optimizing the filter for minimal power consumption while ensuring accurate signal analysis.

• Implementation of a wavelet algorithm using a SC-CMOS filter
• Optimization of the filter for low power consumption
• Analysis of the filter's performance in terms of transient response and noise
• Design and implementation of a two-stage CMOS operational amplifier
• Comparison of discrete and continuous time approaches for filter implementation

Zusammenfassung der Kapitel (Chapter Summaries)

• Chapter I introduces the Laplace transform and Padè approximation techniques, which are essential for transforming the filter expression from the s-domain to the z-domain. This chapter also examines the impulse invariance technique for discrete-time filter design.
• Chapter II focuses on the optimization of the filter, including dynamic range analysis, state-space realization, and the use of Hessenberg and Schur decompositions for optimal capacitance distribution.
• Chapter III compares discrete and continuous time approaches for filter implementation, highlighting the advantages and disadvantages of each approach.
• Chapter IV explores the circuital realization of the filter, including the synthesis of the state-space filter, filter settings, and the analysis of the circuit's response to different inputs.
• Chapter V delves into the design and implementation of the two-stage CMOS operational amplifier, a crucial component of the filter. This chapter examines the amplifier's topology, analysis, frequency compensation, and integrator bandwidth.
• Chapter VI presents the final schematic of the wavelet filter, including the transmission gate and dummy gate, and analyzes its performance in terms of transient response, power consumption, and noise.

Schlüsselwörter (Keywords)

This thesis focuses on the development and implementation of a low-power SC-CMOS filter for analyzing ECG signals in pacemakers. Key concepts include: wavelet algorithm, SC-CMOS technology, power optimization, transient response, noise analysis, operational amplifier design, discrete and continuous time approaches, filter design.